The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
A plurality of nodes may be interconnected in a system. For example, each node may include one or more processors and other components including, but not limited to, volatile and non-volatile memory, application specific hardware, such as application specific integrated circuits (ASICs), and various communication interfaces. For example only, the ASICs and communication interfaces may include telecommunication, military, industrial automation, and/or global positioning system (GPS) devices and interfaces. Each node may include one or more printed circuit boards (PCBs) arranged in a card or board configuration.
The nodes may be interconnected in a CPU cluster system such as a chassis configured to enclose a backplane and a plurality of nodes. For example, each node may include one or more plug or socket type edge connectors (i.e., connectors arranged on an edge of a card or board). The backplane may include a plurality of complementary socket or plug type backplane connectors configured to receive the edge connectors of the nodes. The nodes are inserted into the chassis and the backplane connectors receive respective ones of the edge connectors. Example implementations of CPU cluster systems include, but are not limited to, Advanced Telecommunications Computing Architecture (ATCA) systems, Compact Peripheral Component Interconnect (CPCI) systems, and VPX systems. Other suitable connection types may be used.
The nodes communicate with one another via the backplane. For example, the backplane may include one or more data buses. Or, the nodes may communicate directly with each other via point-to-point connections through the backplane. The nodes may communicate data (e.g., packet based data), timing information (e.g., clock signals), or any other information via the backplane.